The present invention relates to a chip semiconductor device and a method of forming the same.
FIGS. 1 and 2 are fragmentary cross sectional elevation views illustrative of sequential steps involved in a method of forming a semiconductor chip including a semiconductor device. This conventional method is disclosed in Japanese laid-open patent publication No. 4-148553. As illustrated in FIG. 1, a mother board 24 has top and bottom surfaces each of which is provided with a plurality of electrodes thereon. The mother board 24 has a plurality of through holes 25, each of which is filled with a contact 26 so that each pair of the electrodes provided on the top and bottom surfaces are electrically connected through the contact 26 in the through hole 25. Elements 27 are provided on the top surface of the mother board 24 between the through holes 25. Each of the elements 27 is electrically connected through wirings 28 to the electrodes provided on the top surface of the mother board 24.
As illustrated in FIG. 2, a sealing cap 31 having a plurality of recessed portions 32 is placed on and fixed to the mother board 24 so that the recessed portions 32 accommodate the elements 27 and the wirings 28. The mother board 24 with the sealing cap 31 are cut along C--C lines to be divided into a plurality of semiconductor chips 41. FIG. 3 is a schematic view illustrative of the individual chip.
The size of the individual recessed portion 32 has to be larger than the semiconductor element 27 by about 200 micrometers to form a space for the wirings 28 and in consideration of an accuracy of alignment of the cap. For this reason, it is difficult to reduce the size of the recessed portion near the semiconductor element size.
The rate of mounting of the elements 27 onto the mother board 24 is as fast as 0.6 seconds per unit. It is difficult to obtain a remarkable increase in the rate of the mounting of the elements 27. The productivity of the semiconductor chips 41 is limited by the rate of the mounting of the elements 27. For this reason, it is difficult to obtain a remarkable increase in the productivity of the semiconductor elements.
In the above circumstances, it had been required to develop a novel method of fabricating a chip semiconductor device free from the above problems.